Texas Instruments OMAP5912 Reference Manual page 1393

Table 50. Transmit DMA Control Register n (TXDMAn) (Continued)
Bit Name
13:10 Reserved
9:0 TXn_TSC
SPRU761A
Description
Reserved
Transmit DMA channel n transfer size counter. The binary encoded value from 0
to 1023, which the USB device controller writes into this register, corresponds to
the number of bytes or number of buffer transfers (function of
TXDMAn.TXn_EOT) to be transmitted by the transmit DMA channel n. When
read, the register reflects the number of bytes/buffers the USB device has still to
transmit. Read mode is only provided for software debug purposes.
Caution: For ISO transfer, the user must verify that the set value does not exceed
the ISO FIFO size for the endpoint. There is no hardware mechanism to prevent
this situation. If this situation occurs, results are unpredictable.
Caution: For bulk transfer, when TXDMAn.TXn_EOT = 0, a set value of
TXDMAn.TXn_TSC = 0 means 1024 buffers and not 0. The counter then
operates in the following way: 000, 3FF, 3FE, 0001, 000, stop. When
TXDMAn.TXn_EOT = 1, a set value of TXDMAn.TXn_TSC = 0 a NULL packet is
sent in response to the next IN token.
Values after MPU or USB reset are low (all 10 bits).
This read/write register controls the operation of the transmit DMA channel n
(n = 0, 1, 2).
USB Device Controller
Universal Serial Bus (USB) 101