Texas Instruments OMAP5912 Reference Manual page 1320

USB Host Controller
Table 3. HC Operating Mode Register (HCCONTROL)(Continued)
Bit Name
9 RWC
8 IR
7:6 HCFS
5 BLE
4 CLE
28 Universal Serial Bus (USB)
Value Description
Remote wake-up connected. This bit has no effect in
OMAP5912. The OMAP5912 USB host controller does
not provide a processor wake-up mechanism.
Interrupt routing. The OMAP5912 USB host controller
does not provide an SMI interrupt. This bit must be 0 to
allow the USB host controller interrupt to propagate to
the MPU level 2 interrupt controller.
Host controller functional state:
00 USB reset
01 USB resume
10 USB operational
11 USB suspend
A transition to USB operational causes SOF generation
to begin in 1 ms. The USB host controller can
automatically transition from USB suspend to USB
resume if a downstream resume is received. The USB
host controller enters USB suspend after a software
reset. The USB host controller enters USB reset after a
hardware reset. The USB reset state resets the root
hub and causes downstream signaling of USB reset.
Bulk list enable:
0 Bulk ED list not processed in the next 1-ms frame. Host
controller driver can modify the list. If driver removes
the ED pointed to by the HCBULKCURRENTED from
the ED list, it must update HCBULKCURRENTED to
point to an ED still on the list before it re-enables the
bulk list.
1 Enables processing of bulk ED list. HCBULKHEADED
must be 0 or point to a valid ED before setting this bit.
HCBULKCURRENTED must point to a valid ED or be 0
before setting this bit.
Control list enable:
Type Reset
R/W 0
R/W 0
R/W 00
R/W 0
R/W 0
SPRU761A