Texas Instruments OMAP5912 Reference Manual page 1325

Table 6. HC Interrupt Enable Register (HCINTERRUPTENABLE) (Continued)
Bit Name
5 FNO
4 UE
3 RD
2 SF
SPRU761A
Description
Frame number overflow
When 1 and MIE is 1, allows frame number overflow
interrupts to propagate to the OMAP5912 level 2 interrupt
controller.
When 0, or when MIE is 0, frame number overflow
interrupts do not propagate.
A write of 0 has no effect on this bit.
A write of 1 sets this bit.
Unrecoverable error
When 1 and MIE is 1, allows unrecoverable error interrupts
to propagate to the OMAP5912 level 2 interrupt controller.
When 0, or when MIE is 0, unrecoverable error interrupts do
not propagate.
A write of 0 has no effect on this bit.
A write of 1 sets this bit.
Resume detected
When 1 and MIE is 1, allows resume detected interrupts to
propagate to the OMAP5912 level 2 interrupt controller.
When 0, or when MIE is 0, resume detected interrupts do
not propagate.
A write of 0 has no effect on this bit.
A write of 1 sets this bit.
Start of frame
When 1 and MIE is 1, allows start of frame interrupts to
propagate to the OMAP5912 level 2 interrupt controller.
When 0, or when MIE is 0, start of frame interrupts do not
propagate.
A write of 0 has no effect on this bit.
A write of 1 sets this bit.
USB Host Controller
Type
R/W:
R/W
R/W
R/W
Universal Serial Bus (USB)
Reset
0
0
0
0
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