Texas Instruments OMAP5912 Reference Manual page 1312

USB Host Controller
20 Universal Serial Bus (USB)
the OMAP5912 USB host controller are already familiar with the USB
Specification and OHCI Specification for USB.
The OMAP5912 OTG controller can use one of the USB host controller ports
as part of a USB OTG-capable connection. When used for an OTG
connection, the host controller port acts as the upstream device when
OMAP5912 controls the OTG link, and the USB function controller acts as the
downstream device when OMAP5912 acts as an OTG downstream device.
The OMAP5912 OTG controller is described in Section 15.4, USB OTG
Controller.
The OMAP5912 USB host controller implements the register set and makes
use of the memory data structures defined in the OHCI Specification for USB.
These registers and data structures are the mechanism by which a USB host
controller driver software package can control the OMAP5912 USB host
controller. The OHCI Specification for USB also defines how the USB host
controller implementation must interact with those registers and data
structures in system memory. The OMAP5912 MPU accesses these registers
via the OMAP5912 MPU public peripheral bus.
To reduce processor software and interrupt overhead, the USB host controller
generates USB traffic based on data structures and data buffers stored in
system memory. The OMAP5912 USB host controller accesses these data
structures without direct intervention by the processor using the OMAP5912
open-core protocol (OCPI) bus. These data structures and data buffers can
be located in internal or external system RAM.
The USB host controller provides an interrupt to the MPU level 2 interrupt
handler to signal certain hardware events to the host controller driver software.
Figure 1 shows the OMAP5912 USB host controller.
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