Texas Instruments OMAP5912 Reference Manual page 1323

Table 5. HC Interrupt and Status Register (HCINTERRUPTSTATUS)
Bit Name
31 Reserved
30 OC
29 :7 Reserved
6 RHSC
5 FNO
4 UE
3 RD
2 SF
SPRU761A
Description
Reserved
Ownership change
The OMAP5912 USB host controller does not implement
ownership change interrupts.
Reserved
Root hub status change
When 1, indicates a root hub status change has occurred.
Write of 0 has no effect.
Write of 1 clears this bit.
Frame number overflow
When 1, indicates a frame number overflow has occurred.
Write of 0 has no effect.
Write of 1 clears this bit.
Unrecoverable error
When 1, indicates that an unrecoverable error has occurred
on the OCPI bus or that an isochronous TD PSW field
condition code was not set to Not Accessed when the USB
host controller attempted to perform a transfer using that
PSW/offset pair.
Write of 0 has no effect.
Write of 1 clears this bit.
Resume detected
When 1, indicates that a downstream device has issued a
resume request.
Write of 0 has no effect.
Write of 1 clears this bit.
Start of frame
When 1, indicates that a SOF has been issued.
Write of 0 has no effect.
Write of 1 clears this bit.
USB Host Controller
Type
R/W
R/W
R/W
R/W
R/W
Universal Serial Bus (USB)
Reset
R 0
0
0
0
0
0
31