Texas Instruments OMAP5912 Reference Manual page 1235

Multimedia processor device overview and architecture
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UARTs
Table 103. BOF Length Register (EBLR)
Bit
Name
7:0
EBLR
Table 104. Auxiliary Control Register (ACREG)
Bit
Name
7
PULSE_TYPE
6
SD_MOD
5
DIS_IR_RX
4
DIS_TX_UNDERRUN
170
Serial Interfaces
IrDA modes only.
This register specifies the number of BOF + xBOFs to transmit in IrDA SIR
operation. The value set into this register must take into account the BOF
character. To send only one BOF with no XBOF, this register must be set to 1.
To send one BOF with N XBOF, this register must be set to n+1. Furthermore,
the value 0 sends 1 BOF plus 255 XBOF.
In IrDA MIR mode, this register specifies the number of additional start flags
(MIR protocol mandates a minimum of two start flags).
Function
This register allows definition up to 176 xBOFs, the
maximum required by IrDA specification.
Offset Address (hex): 0x0F x S and LCR[7] = 0
IrDA modes only.
Function
SIR pulse width select
0: 3/16 of baud-rate pulse width.
1: 1.6 µs.
Primary output used to configure transceivers.
Connected to the SD/MODE input pin of IrDA
transceivers
0: SD pin is set to high.
1: SD pin is set to low.
0: Normal operation (Note: RXIR input
automatically disabled during transmit but enabled
outside of transmit operation.)
1: Disables RXIR input (permanent state−
independent of transmit).
Hence, RX_IR is disabled when either TX is active
or ACREG[5] = 1
0: Long stop bits cannot be transmitted, and TX
underrun is enabled.
1: Long stop bits can be transmitted, and TX
underrun is disabled.
R/W
Reset
R/W
0x00
R/W
Reset
R/W
0
R/W
0
R/W
0
R/W
0
SPRU760B

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