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UARTs
Figure 74.
Transmit FIFO DMA Request Generation (8 Spaces)
TX buffer
max
Programmable
threshold
Zero byte
DMA Active periods,
this does not represent
the DMA signalling
188
Serial Interfaces
1 character transmitted
The final example in Figure 75 illustrates the setting of 1 space that uses the
DMA for each transfer of 1 character to the transmit buffer. The buffer is filled
at a faster rate than the BAUD rate transmits data to the TX pin. Eventually,
the buffer is completely full and the DMA operation stops transferring data to
the transmit buffer.
The buffer holds the maximum amount of data words on 2 occasions. Shortly
after that the DMA is disabled to illustrate the slower transmission of the data
words to the TX pin. Eventually, the buffer is emptied at the rate specified by
the baud-rate settings of the DLL and DLH registers.
Again, the DMA settings must correspond to the local host DMA controller
settings to ensure the correct operation of this logic.
8 spaces
Example, DMA disabled to
illustrate the end of the
transfer
Time
SPRU760B
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