Texas Instruments OMAP5912 Reference Manual page 1340

USB Host Controller
Table 23. HC Port 1 Status and Control Register (HCRHPORTSTATUS1)
(Continued)
Bit Name
18 PSSC
17 PESC
16 CSC
15:10 Reserved
9 LSDA/CPP
48 Universal Serial Bus (USB)
Description
Port 1 suspend status change
This bit indicates, when 1, that the port 1 port suspend status
has changed. Suspend status is considered to have changed
only after the resume pulse, low-speed EOP, and 3-ms
synchronization delays have been completed.
Write of 0 has no effect.
Write of 1 clears this bit.
Port 1 enable status change
This bit indicates, when 1, that the port 1 port enable status
changed.
Write of 0 has no effect.
Write of 1 clears this bit.
Port 1 connect status change
This bit indicates, when 1, that the port 1 current connect
status has changed due to a connect or disconnect event. If
current connect status is 0 when a set port reset, set port
enable, or set port suspend write occurs, then this bit is set.
A write of 1 clears this bit. A write of 0 has no effect.
If the HCRHDESCRIPTORB.DR[1] bit is set to indicate a
non-removable USB device on port 1, this bit is set only after
a root hub reset to inform the system that the device is
attached.
Reserved
Port 1 low-speed device attached/clear port power
This bit indicates, when read as 1, that a low-speed device is
attached to port 1. A 0 in this bit indicates a full-speed device.
This bit is valid only when port 1 current connect status is 1.
The host controller driver can write a 1 to this bit to clear the
port 1 port power status. A write of 0 to this bit has no effect.
OMAP5912 USB host controller does not control external
port power using OHCI mechanisms, so, if required, USB
host port power must be controlled through other means.
This bit has no relationship to the OTG controller register bits
that relate to VBUS. System software can update this register
to simplify host controller driver and/or OTG driver coding.
Type Reset
R/W 0
R/W 0
R/W 0
R/W 0
SPRU761A