Texas Instruments OMAP5912 Reference Manual page 1447

Figure 20. Endpoint 0 TX Interrupt Handler
Endpoint 0 RX handler
Write EP_NUM register:
− EP_NUM.EP_NUM = 0
− EP_NUM.EP_DIR = 1
− EP_NUM.EP_SEL = 1
− EP_NUM.SETUP_SEL = 0
Yes
STAT_FLG.
ACK bit set?
Yes
Is LH-initiated stall
and can remove halt
condition?
SPRU761A
Control
Yes
read flag set
?
No
Retire data from EPO
application's TX buffer
(based on amount
previously put into TX FIFO).
Decrement
wlength_count value by
nb of received bytes.
No
wlength_count
>0 or other data
to send ?
Yes
Write non-ISO
TX data
Set CTRL.Clr_HALT
bit to 1.
No
Application-
specific actions
to complete
control read
Is control read data stage (IN transaction on
EPO out of control read data stage or control
or write status stage are automatically stalled
by the core.
Write EP_NUM register:
− EP_NUM.EP_NUM = 0
− EP_NUM.EP_DIR = 1
− EP_NUM.EP_SEL = 0
− EP_NUM.SETUP_SEL = 0
Set
CTRL.SET_FIFO_EN bit
to 1.
Application
specific action
to remove stall
Write EP_NUM register:
− EP_NUM.EP_NUM = 0
− EP_NUM.EP_DIR = 1
− EP_NUM.EP_SEL = 0
− EP_NUM.SETUP_SEL = 0
Universal Serial Bus (USB)
USB Device Controller
Write EP_NUM register:
− EP_NUM.EP_NUM = 0
− EP_NUM.EP_DIR = 1
− EP_NUM.EP_SEL = 0
− EP_NUM.SETUP_SEL = 0
Prepare for
Control Write
Status Stage
Write EP_NUM register:
− EP_NUM.EP_NUM = 0
− EP_NUM.EP_DIR = 1
− EP_NUM.EP_SEL = 0
− EP_NUM.SETUP_SEL = 0
Write EP_NUM register:
− EP_NUM.EP_NUM = 0
− EP_NUM.EP_DIR = 1
− EP_NUM.EP_SEL = 0
− EP_NUM.SETUP_SEL = 0
End of endpoint 0 TX
handler
155