Texas Instruments OMAP5912 Reference Manual page 1395

Table 52. Endpoint 0 Configuration Register (EP0)
Bit Name
15:14 Reserved
13:12 EP0_SIZE
11 Reserved
10:0 EP0_PTR
SPRU761A
Description
Reserved
Endpoint 0 FIFO size. This field contains the endpoint 0 FIFO size value and
must match the value sent by the USB device controller to the USB host during
the GET_DEVICE_DESCRIPTOR request preceding configuration phase.
Status flags (STAT_FLG.NON_ISO_FIFO_EMPTY and
STAT_FLG.NON_ISO_FIFO_FULL) and overrun and underrun conditions are
based on this value for all IN and OUT transactions to endpoint 0.
The USB device controller must fill this field before setting
SYSCON1.CFG_LOCK.
00: 8 bytes
01: 16 bytes
10: 32 bytes
11: 64 bytes
Values after USB device controller hardware reset or USB reset are unchanged
(which means that value is unknown until first write access).
Reserved
Endpoint 0 pointer. This field contains the address of the endpoint 0 pointer.
Value 0x000 is not permitted (reserved for setup FIFO).
0x000: address = BASE (not permitted)
0x001: address = BASE + 8 bytes
0x002: address = BASE + 16 bytes
0x003: address = BASE + 24 bytes
...
0x0FF: address = BASE + 2040 bytes
Values after USB device controller hardware reset or USB reset are unchanged
(which means that values are unknown until first write access).
Note: The pointer value must be set to a value < 0xFF, because the memory
size is 2K bytes and a pointer coded value = 0xFF corresponds to 2040 bytes.
Addressing upper bytes results in memory overlap.
This read/write register gives the device configuration for control endpoint 0.
Values depend on whether the reset action comes from USB device controller
(MPU) or the USB host.
USB Device Controller
Universal Serial Bus (USB) 103