Texas Instruments OMAP5912 Reference Manual page 1424

USB Device Controller
Non-Autodecoded Control Read Transfer Handshaking
132 Universal Serial Bus (USB)
The data stage of a control read transfer consists of one or more IN
transactions. Transaction handshaking and interrupt generation as for
non-isochronous, non-control IN endpoints applies; the MPU can cause NAK,
STALL, or ACK signaling for the data stage transactions. At endpoint 0 TX
general USB interrupts, MPU code must move more data to the endpoint 0
FIFO, until the last bytes of the requested data have been provided. Although
SETUP packets have a defined payload length, the USB host can cancel the
transaction at any time, without the status stage, and resend another SETUP
command. The MPU code must be able to operate correctly in this situation.
After completion of the data stage, a status stage OUT transaction occurs. The
USB host sends a zero-length data packet, and the MPU code must return its
completion status for the control read standard request via standard
handshaking mechanisms.
Note:
In the case of returning exactly what the host requested and that request was
a multiple of the maximum packet size, no zero-length packet is required. A
zero-length packet is required only when the amount of data the device has
to return is less than the amount requested by the host and the amount re-
turned is a multiple of the maximum packet size (source USB forum).
Handshaking for the setup stage of non-autodecoded control read transfers
is forced by the USB module to always be ACK, unless there is a data error
in the packet, in which case the USB module ignores the transaction. If the
setup packet has a DATA1 PID instead of a DATA0 PID, the setup transaction
is ignored (error).
Data stage handshaking for non-autodecoded control read transfers is
dependent on the endpoint 0 STAT_FLG.FIFO_EN, STAT_FLG.EP_HALTED,
and SYSCON2.STALL_CMD bits. The handshaking information is used
during the data phase of the data stage transaction. The USB specification
requires that once STALL is signaled in a control transfer, it must be signaled
until the next setup token is received. The SYSCON2.STALL_CMD and
CTRL.SET_HALT (reflected through the STAT_FLG.EP_HALTED register bit)
register bits provide this functionality. STAT_FLG.EP_HALTED does not
reflect the forced STALL caused by SYSCON2.STALL_CMD; it retains its
previous value.
The status stage
SYSCON2.STALL_CMD bits.
is controlled by the CTRL.FIFO_EN
SPRU761A
and