Texas Instruments OMAP5912 Reference Manual page 1431

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

Figure 10.
Example of RAM Organization
EP0_SIZE
EP1_RX_SIZE or
2*EP1_RX_SIZE (if
double buffering or ISO)
EP2_RX_SIZE or
2*EP2_RS_SIZE (if
double buffering or ISO)
EP15_RX_SIZE or
2*EP15_RX_SIZE (if
double buffering or ISO)
EP1_TX_SIZE or
2*EP1_TX_SIZE (if
double buffering or ISO)
EP2_TX_SIZE or
2*EP2_TX_SIZE (if
double buffering or ISO)
EP15_TX_SIZE or
2*EP15_TX_SIZE (if
double buffering or ISO)
SPRU761A
Setup Data (8 bytes)
Endpoint0 data
Endpoint1 RX data
Endpoint2 RX data
Endpoint15 RX data
Endpoint1 TX data
Endpoint2 TX data
Endpoint15 TX data
Once
the
endpoints
SYSCON1.CFG_LOCK bit. If this bit is not set, all transactions are ignored by
the core. Then, when the MPU is ready to communicate with the USB host, it
must set the SYSCON1.PULLUP_EN bit. The MPU can wait until the
DS_CHG attach interrupt has been detected and handled before setting the
are
configured,
the
Universal Serial Bus (USB)
USB Device Controller
EP0_PTR
EP1_RX_PTR
EP2_RX_PTR
EP3_RX_PTR
EP15_RX_PTR
EP1_TX_PTR
EP2_TX_PTR
EP3_TX_PTR
EP15_TX_PTR
MPU
must
set
the
139

Advertisement

Table of Contents
loading

Table of Contents