Texas Instruments OMAP5912 Reference Manual page 1344

Multimedia processor device overview and architecture
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USB Host Controller
Table 24. HC Port 2 Status and Control Register (HCRHPORTSTATUS2)
(Continued)
Bit
Name
17
PESC
16
CSC
15:10
Reserved
9
LSDA/CPP
52
Universal Serial Bus (USB)
Description
Port 2 enable status change
This bit indicates, when 1, that the port 2 port enable status
changed.
A write of 1 clears this bit. A write of 0 has no effect.
Port 2 connect status change
This bit indicates, when 1, that the port 2 current connect
status has changed due to a connect or disconnect event. If
current connect status is 0 when a set port reset, set port
enable, or set port suspend write occurs, then this bit is set.
A write of 1 clears this bit. A write of 0 has no effect.
If the HCRHDESCRIPTORB.DR[2] bit is set to indicate a
nonremovable USB device on port 2, this bit is set only after
a root hub reset to inform the system that the device is
attached.
Reserved
Port 2 low-speed device attached/clear port power
This bit indicates, when read as 1, that a low-speed device is
attached to port 2. A 0 in this bit indicates a full-speed device.
This bit is valid only when port 2 current connect status is 1.
The host controller driver can write a 1 to this bit to clear the
port 2 port power status. A write of 0 to this bit has no effect.
The OMAP5912 USB host controller does not control
external port power using OHCI mechanisms, so, if required,
USB host port power must be controlled through other
means.
Type
Reset
R/W
0
R/W
0
R/W
0
SPRU761A

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