Texas Instruments OMAP5912 Reference Manual page 1430

USB Device Controller
3.8 USB Device Initialization
138 Universal Serial Bus (USB)
During control writes, if the USB host sends more bytes than indicated in the
setup packet, the transfer is STALLed. If the USB host sends fewer bytes than
were expected, the request is accepted. But if the USB host moves to status
stage earlier than expected for a non-autodecoded request, the IN status
stage is NAKed because the MPU has not enabled the TX FIFO.
To allow communication between the device and a USB host, the MPU must
configure the device by filling the configuration registers.
For each endpoint, the MPU must write on the dedicated register:
-
Endpoint size
-
Whether double-buffering is allowed for endpoint or not
-
Endpoint type (ISO or non-ISO)
-
Address of the pointer
System software must choose how to allocate the 2040 available bytes of USB
device controller RAM to the USB endpoints. Receive endpoint size and type
are configured using the EP1_RX through EP15_RX registers. Transmit
endpoint size and type are configured using the EP1_TX through EP15_TX
registers. Figure 10 shows an example of the RAM organization, obtained by
following the flowchart shown in Figure 11.
SPRU761A