Texas Instruments OMAP5912 Reference Manual page 1332

USB Host Controller
Table 17. HC Frame Number Register (HCFMNUMBER)
Bit Name
31:16 Reserved
15 :0 FN
Table 18. HC Periodic Start Register (HCPERIODICSTART)
Bit Name
31:14 Reserved
13:0 PS
Table 19. HC Low-Speed Threshold Register (HCLSTHRESHOLD)
Bit Name
31:14 Reserved
13:0 LST
40 Universal Serial Bus (USB)
Description
Reserved
Frame number
This field reports the current USB frame number. It is
incremented when the frame remaining field is reloaded with
the frame interval field value. Frame number automatically
rolls over from 0xFFFF to 0x0000.
After frame number is incremented, its new value is written to
the HCCA and the USB host controller sets the SOF interrupt
status bit and begins processing the ED lists.
The HC periodic start register defines the position within the USB frame where
EDs on the periodic list have priority over EDs on the bulk and control lists.
Description
Reserved
Periodic start
The host controller driver must program this value to be
about 10% less than the frame interval field value so that
control and bulk EDs have priority for the first 10% of the
frame; then periodic EDs have priority for the remaining 90%
of the frame.
The HC low-speed threshold register defines the latest time in a frame that the
USB host controller can begin a low-speed packet.
Description
Reserved
Low-speed threshold
This field defines the number of full-speed bit times in the
frame after which the USB host controller cannot start an
8-byte low-speed packet. The USB host controller only
begins a low-speed transaction if the frame remaining field is
greater than the low-speed threshold.
The host controller driver must set this field to a value that
ensures that an 8-byte low-speed TD completes before the
end of the frame. When set, the host controller driver must
not change the value.
Type Reset
R 0x0000
Type Reset
R/W 0x0000
Type Reset
R/W 0x0628
SPRU761A