Texas Instruments OMAP5912 Reference Manual page 1417

Multimedia processor device overview and architecture
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Figure 9.
Stages and Transaction Phases of Non-Autodecoded Control Transfers
Non-autodecoded control write transfers—correct status:
Setup
Token
Non-autodecoded control write transfers—request error:
(due to LH setting CTRL.STALL_CMD)
Setup
Token
Non-autodecoded control read transfers—correct status:
Setup
Token
Non-autodecoded control read transfers—request error:
(due to LH setting CTRL.STALL_CMD)
Setup stage
Setup
Token
SPRU761A
(Occurs 0 or more times, depending
Setup stage
on the amount of data)
Comman
ACK
Out Token
d
Setup interrupt.
No flag is updated.
(Occurs 0 or more times, depending
Setup stage
on the amount of data)
Comman
ACK
Out Token
d
Setup interrupt.
No flag is updated.
(Occurs 1 or more times, depending on
Setup stage
the command and amount of data)
Comman
ACK
In Token
d
Setup interrupt.
No flag is updated.
(Occurs 1 or more times, depending on
the command and amount of data)
Comman
ACK
In Token
d
Setup interrupt.
No flag is updated.
STAT_FLG.STALL bit set
Data stage
Comman
Status
ACK
d Data
Token
EP0 RX Interrupt
STAT_FLG.ACK bit set
(one per Out transaction)
Data stage
Comman
Status
Stall
d Data
Token
EP0 RX Interrupt
RXSTATFLG.STALL bit set
(one per Out transaction)
Data stage
Comman
Status
ACK
d Data
Token
EP0 TX interrupt
STAT_FLG.ACK bit set
(one per In transaction)
Data stage
Status
Stall
Token
EP0 TX Interrupt
(one per In transaction)
Universal Serial Bus (USB)
USB Device Controller
Status stage
Completion
ACK
Status
EP0 TX Interrupt
STAT_FLG.ACK bit set
Status stage
Completion
Stall
Status
EP0 TX Interrupt
STAT_FLAG.STALL bit set
Status stage
0−length
Completion
data
Status
EP0 RX interrupt
STAT_FLG.ACK bit set
Status stage
0−length
Stall
data
EP0 RX Interrupt
STAT_FLG.STALL bit set
125

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