Texas Instruments OMAP5912 Reference Manual page 1410

USB Device Controller
3.4.2 Non-Isochronous IN Transaction Error Conditions
STALLed Transactions
118 Universal Serial Bus (USB)
EP_NUM.EP_SEL bit. That clears the STAT_FLG.NAK bit for this endpoint to
allow the next transaction status to be written into the STAT_FLG register.
Signaling NAK does not cause the endpoint TX FIFO to be cleared (because
the MPU still retains control of the FIFO).
Signaling NAK handshake for several endpoint transactions in a row can
cause the PC host to discard the transaction, so NAK is not necessarily a good
mechanism in cases where the MPU is not able to service a request for long
periods of time.
The USB module sends a STALL handshake to the USB host during the data
phase of the transaction to the IN endpoint either if the endpoint
STAT_FLG.EP_HALTED flag is set, or if a request error occurs (control
transaction only). A USB STALL handshake indicates that the device endpoint
is in a condition in which it is not able to transfer data and instructs the USB
host not to retry the transaction. The device typically requires intervention via
some other mechanism to clear the condition, usually a control transfer via
endpoint 0. The MPU can set the endpoint EP_HALTED bit by selecting the
endpoint by writing the appropriate value in EP_NUM register, and then setting
the endpoint CTRL.Set_HALT bit, and clear it by selecting the endpoint, and
then setting the endpoint CTRL.Clr_HALT bit. When the endpoint
EP_HALTED bit is set, the endpoint signals STALL for its IN transactions until
the HALT condition is cleared. When the STALL handshake is sent in response
to a transaction to the endpoint, the STAT_FLG.STALL bit is set, and an
endpoint-specific
interrupt to the MPU is generated.
In response to the endpoint interrupt, the MPU must read the EPN_STAT
register to identify the endpoint causing the interrupt, and then write a 1 to the
interrupt bit to clear it. The MPU must then set EP_NUM.EP_NUM to the
endpoint number, EP_NUM.EP_DIR to 1 (to signal an IN endpoint), and
EP_NUM.EP_SEL to 1, and then read the endpoint status from STAT_FLG.
STAT_FLG.STALL is set to indicate that the endpoint sent a STALL handshake
to the USB host. The MPU must then clear EP_NUM.EP_SEL bit. This clears
the STAT_FLG.STALL bit for this endpoint and allows the next transaction
status to be written into the STAT_FLG register.
Except for control endpoint 0, separate endpoint halt bits are defined for each
direction; so for a given endpoint number, the TX can be halted when the RX
is not.
SPRU761A