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Acknowledged Transactions (ACK)
Non-Acknowledged Transactions (NAK)
SPRU761A
When the endpoint IN transaction completes on the USB bus with an ACK
handshake, the endpoint generates an endpoint-specific interrupt to the MPU
(see first case in Figure 5). In response to the endpoint interrupt, the MPU must
read the EPN_STAT register to identify the endpoint causing the interrupt, and
then write a 1 to the interrupt bit to clear it. The MPU must then set
EP_NUM.EP_NUM to the endpoint number, EP_NUM.EP_DIR to 1 (to signal
an IN endpoint), and EP_NUM.EP_SEL to 1, and then read the endpoint status
from STAT_FLG. STAT_FLG.ACK is set to indicate that the endpoint received
an ACK handshake from the USB host, and the TX FIFO is empty (because
any data that was in the TX FIFO was transmitted during the IN transaction).
If the MPU has more data to transmit to the USB host, it must fill the TX FIFO
following the process indicated above. It must then clear EP_NUM.EP_SEL
bit. This clears the STAT_FLG.ACK bit for this endpoint to allow next
transaction status to be written into the STAT_FLG register.
For the case in which the MPU is not ready to provide transmit data for
transactions to an IN endpoint, the core provides a NAK handshake to the host
for any USB IN transaction to that endpoint . Readiness to transmit data is
signaled via the endpoint STAT_FLG.FIFO_EN bit; when 1 it indicates that
data in the TX FIFO can be sent to the USB host. When the endpoint
STAT_FLG.FIFO_EN bit is 0 and an IN transaction to the endpoint occurs,
NAK handshake is sent, indicating that the MPU is not ready to handle the
request.
If SYSCON1.NAK_EN bit is cleared, when the NAK handshake is sent in the
data packet portion of the transaction to the IN endpoint, STAT_FLG is not
updated and no endpoint-specific interrupt to the MPU is generated. If the
SYSCON1.NAK_EN bit is set, when the NAK handshake is sent in the data
packet portion of the transaction to the IN endpoint, the STAT_FLG.NAK bit is
set and an endpoint-specific interrupt to the MPU is generated.
In response to the endpoint interrupt, the MPU must read the EPN_STAT
register to identify the endpoint causing the interrupt, and then write a 1 to the
interrupt bit to clear it. The MPU must then set EP_NUM.EP_NUM to the
endpoint number, EP_NUM.EP_DIR to 1 (to signal an IN endpoint), and
EP_NUM.EP_SEL to 1, and then read the endpoint status from STAT_FLG.
STAT_FLG.NAK is set to indicate that the endpoint sent a NAK handshake to
the USB host. If the MPU has data to transmit to the USB host, it must fill the
TX FIFO following the process indicated above. The MPU must then clear the
USB Device Controller
Universal Serial Bus (USB)
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