Texas Instruments OMAP5912 Reference Manual page 1364

Multimedia processor device overview and architecture
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USB Device Controller
Table 33. Endpoint Selection Register (EP_NUM) (Continued)
Bit
Name
4
EP_DIR
3:0
EP_NUM
Table 34. Data Register (DATA)
Bit
Name
15:0
DATA
† A write into the data register (DATA) when EP_NUM.EP_DIR = 0 and a read from the register when EP_NUM.EP_DIR = 1 are
denied.
72
Universal Serial Bus (USB)
Description
The endpoint direction bit gives the direction associated with the endpoint number
selected in EP_NUM.EP_NUM:
0: OUT endpoint
1: IN endpoint
Value after MPU or USB reset is low.
The endpoint number binary encoded in these four bits, associated with the
direction given by EP_NUM.EP_DIR bit, is the current endpoint selected. All
reads and writes to the endpoint status and the control and data locations are for
this endpoint.
0000: EP0
0001: EP1
...
1111: EP15
Value after MPU or USB reset is low.
This read/write register selects and enables the endpoint that can be accessed
by the USB device controller.
Description
Transmit/receive FIFO data:
EP_NUM.EP_DIR = 1: This register contains the data written by the USB device
controller to be sent to the USB host during the next IN transaction. Data can be
written successfully only if the EP_NUM.EP_SEL bit is asserted.
EP_NUM.EP_DIR = 0: This register contains the data received by the USB core
from USB host OUT or SETUP transactions. Data can be read successfully only if
the EP_NUM.EP_SEL bit is asserted, or if EP_NUM.SETUP_SEL bit is asserted
(for setup data).
This register is the entry point to write into a selected TX endpoint or to read
data from a selected RX endpoint, or to read data from setup FIFO. If selected
endpoint direction is OUT, this register is read-only and a write into it is denied.
If selected endpoint direction is IN, this register is write-only and a read to this
register is denied.
SPRU761A

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