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USB Host Controller
2.3.3
OHCI USB Suspend State
24
Universal Serial Bus (USB)
The OMAP5912 USB host controller does not check HCCONTROLHEADED
registers,
HCBULKHEADED
HCCAINTERRUPTTABLE pointers before using them to access EDs. If any
of these pointers are NULL when the corresponding list enable bit is set, the
OMAP5912 USB host controller attempts to access using the physical
address of 0, which causes an unrecoverable error to be signaled.
HOSTUEADDR, HOSTUESTATUS, and HOSTTIMEOUTCTRL registers are
updated in this case.
The OMAP5912 USB host controller ignores upstream traffic from
downstream devices for about 3 ms after the host controller state
(HCCONTROL.HCFS) changes from USB resume state to USB operational
state. If any TDs cause generation of downstream packets during that time,
the downstream packets are sent, but any response provided by the
downstream device is ignored. Any such TDs are aborted with completion
codes marked as Device Not Responding. TDs on any of the lists (periodic,
control, bulk, and isochronous) can cause such an occurrence.
The USB specification requires that system software must provide a 10-ms
resume recovery time (T
signaling to normal operational mode. During that time, only start of frame
packets are to be sent on the bus segment. It is recommended that system
software disable all list enable bits (HCCONTROL.PLE, HCCONTROL.IE,
HCCONTROL.CLE, and HCCONTROL.BLE) and then wait for at least 1 ms
before setting the host controller into USB suspend state (via
HCCONTROL.HCFS). When restoring from suspend, system software must
set the host controller into USB resume state, and wait for the host controller
to transition into USB operational state. System software must then wait 10 ms
before enabling the host controller list enable bits.
When the host controller has been placed into the USB suspend state under
software control, but is brought out by a remote wake-up, system software
must
monitor
HCRHPORTSTATUS[x].PSSC bits. The HCRHPORTSTATUS[x].PSS bit
changes to 0 only after completion of resume signaling on the bus segment
completes and completion of the 3-ms period where packets from downstream
devices are ignored.
When using port-specific suspend, it is not necessary to disable the host
controller lists so long as there are no active EDs and TDs directed toward
devices that are downstream of the suspended port. For port-specific suspend
operations, the host controller does not issue a root hub status change
interrupt
with
the
registers,
or
) after a bus segment transitions from resume
RSMRCY
the
HCRHPORTSTATUS[x].PSS
HCRHPORTSTATUS[n].PSSC
the
values
in
the
bit
=
1
SPRU761A
32
and
and
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