Texas Instruments OMAP5912 Reference Manual page 1230

Table 92. Mode Definition Register 2 (MDR2)
Bit Name
7:3 −
2:1 STS_FIFO_TRIG
0 IRTX_UNDERRUN
SPRU760B
Function
Reserved
Frame status FIFO threshold select:
00: 1 entry
01: 4 entries
10: 7 entries
11: 8 entries
IRDA transmission status interrupt
When the IIR[5] interrupt occurs, the meaning of the
interrupt is:
0: IRTX last bit of the frame has been transmitted
successfully without error.
1: IRTX underrun has occurred. The last bit of the
frame has been transmitted but with an underrun
error present. The bit is reset to 0 when the
RESUME register is read.
Offset Address (hex): 0x0E x S and LCR[7] = 1 and read
UART autobauding mode only.
This status register returns the speed, the number of bits by characters, and
the type of the parity in UART autobauding mode.
In autobauding mode the input frequency of the UART modem must be fixed
to 48 MHz. Any other module clock frequency results in incorrect baud rate
recognition.
UARTs
R/W Reset
R 00000
R/W 00
R 0
Serial Interfaces 165