Texas Instruments OMAP5912 Reference Manual page 1352

Multimedia processor device overview and architecture
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USB Host Controller
Table 28. Host Time-out Control Register (HOSTTIMEOUTCTRL)
Bit
Name
31:1
Reserved
0
TO_DIS
Table 29. Host Revision Register (HOSTREVISION)
Bit
Name
31:8
Reserved
7:4
MAJORREV
3:0
MINORREV
2.5
USB Host Controller Reserved Registers and Reserved Bit Fields
60
Universal Serial Bus (USB)
Description
Reserved
OCPI bus time-out disable
When 1, the USB host controller OCPI bus time-out counter
is disabled and the host controller waits indefinitely for
completion of a USB host controller access to system
memory.
When 0, the USB host controller waits indefinitely to access
system memory. When cleared (the default state), the USB
host controller waits no more than 4096 OCPI bus clocks for
completion of a OCPI bus access to system memory. If the
OCPI bus cycle does not complete in that time, the USB host
controller signals an unrecoverable error.
The host revision register returns the revision number for the OMAP5912 USB
host controller. This register is not defined by the OHCI specification.
Description
Reserved
Major revision number
MAJORREV indicates the major revision number of the USB
host controller. The original OMAP5912 USB host controller
version implements a major revision number of 0.
Minor revision number
MINORREv indicates the minor revision number of the USB
host controller. The original OMAP5912 USB host controller
version implements a minor revision number of 0.
To enhance code reusability with possible future versions of the USB host
controller, reads and writes to reserved USB host controller register addresses
are to be avoided. Unless otherwise specified, when writing registers that have
reserved bits, read-modify-write operations must be used so that the reserved
bits are written with their previous values.
Type
Reset
R/W
0
Type
Reset
R
xxxxxx
R
xx
R
xx
SPRU761A

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