Texas Instruments OMAP5912 Reference Manual page 1388

USB Device Controller
Table 47. DMA Receive Channels Configuration Register (RXDMA_CFG) (Continued)
Bit Name
7:4 RXDMA1_EP
3:0 RXDMA0_EP
96 Universal Serial Bus (USB)
Description
Receive endpoint number for DMA channel 1. The endpoint number binary
encoded in these four bits is the current receive endpoint selected for DMA
channel 1. A zero value indicates that the DMA channel 1 is deactivated. Any
other value automatically enables receive DMA transfer for the selected endpoint.
0000: Receive DMA channel 1 is deactivated.
0001: EP1
...
1111: EP15
Values after MPU or USB reset are low (all 4 bits).
Receive endpoint number for DMA channel 0. The endpoint number binary
encoded in these four bits is the current receive endpoint selected for DMA
channel 0. A zero value indicates that the DMA channel 0 is deactivated. Any
other value automatically enables receive DMA transfer for the selected endpoint.
0000: Receive DMA channel 0 is deactivated.
0001: EP1
...
1111: EP15
Values after MPU or USB reset are low (all 4 bits).
This read/write register enables the three possible DMA receive channels and
selects the endpoint number that is assigned to each of these DMA channels.
An endpoint used by an RX DMA channel must have been configured (through
register EPn_RX). The RXDMA_CFG register
SYSCON1.CFG_LOCK is set.
Only one channel is serviced at a time, so it is better to configure ISO endpoints
on the first channel (RXDMA0_EP). In this case, the ISO endpoint is
configured on channel 2,and it can never be serviced with low software and
a fast USB host.
The USB device controller transmit endpoint DMA channels 0, 1, and 2 are
associated with OMASP5912 controller inputs.
can be filled when
SPRU761A