Texas Instruments OMAP5912 Reference Manual page 1259

Multimedia processor device overview and architecture
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UARTs
Table 112. IrDA Baud Rate Settings (48-MHz Clock)
Baud Rate
IR
(b/s)
Mode
2.4 K
SIR
9.6 K
SIR
19.2 K
SIR
38.4 K
SIR
57.6 K
SIR
115.2 K
SIR
0.576 M
MIR
1.152 M
MIR
4 M
FIR
6.6.10
Hardware Flow Control
194
Serial Interfaces
Baud
En-
DLH,
Multi-
coding
DLL
ple
16x
3/16
1250
16x
3/16
312
16x
3/16
156
16x
3/16
78
16x
3/16
52
16x
3/16
26
41x/42
1/4
2
x
41x/42
1/4
1
x
6x
4
PPM
Hardware flow control is composed of auto-CTS and auto-RTS. Auto-CTS and
auto-RTS can be enabled/disabled independently by programming EFR[7:6].
With auto-CTS, CTS must be active before the module can transmit data.
Auto-RTS only activates the RTS output when there is enough room in the
FIFO to receive data, and deactivates the RTS output when the RX FIFO is
sufficiently full. The HALT and RESTORE trigger levels in the TCR determine
the levels at which RTS is activated/deactivated.
If both auto-CTS and auto-RTS are enabled, data transmission does not occur
unless the receiver FIFO has empty space. Thus, overrun errors are
eliminated during hardware flow control. If they are not enabled, overrun errors
occur when the transmit data rate exceeds the receive FIFO latency.
Actual Baud
Error
Rate (* = Avg)
(%)
(b/s)
2.4 K
0
9.6153 K
+0.16
19.231 K
+0.16
38.462 K
+0.16
57.692 K
+0.16
115.38 K
+0.16
0.5756 M*
0
1.1511 M*
0
4 M
0
Source
Pulse
Jitter
Duration
1
(%)
0
78.1 µs
0
19.5 µs
0
9.75 µs
0
4.87 µs
0
3.25 µs
0
1.62 µs
+1.63/
416 ns
−0.80
+1.63/
208 ns
−0.80
0
125 ns
SPRU760B

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