Texas Instruments OMAP5912 Reference Manual page 1351

Table 26. Host UE Address Register (HOSTUEADDR)
Bit Name
31:0 UE_ADDR
Table 27. Host UE Status Register (HOSTUESTATUS)
Bit Name
31:1 Reserved
0 UEAccess
SPRU761A
Description
Unrecoverable error address
This register captures the physical address of any OCPI bus
operation that is started by the USB host controller that
encounters an unrecoverable error condition. This
information, along with the information in HOSTUESTATUS,
can help a developer determine why the USB host issued an
OCPI access to a physical address that resulted in an
unrecoverable error.
The host UE status register reports the OCPI bus cycle-type for the last
unrecoverable error that occurred. This register has no meaning until an
unrecoverable error has occurred. It also has no meaning if the USB host
controller issues an unrecoverable error because the offset checking fault
occurred while processing an isochronous TD. This register is not defined by
the OHCI specification.
Description
Reserved
Access type when unrecoverable error occurred
When an unrecoverable error occurs because of time-out of
a OCPI bus write, this bit is set. When an unrecoverable error
occurs because of time-out of a OCPI bus read, this bit is
cleared. This bit has no meaning before an unrecoverable
error occurs.
This information, along with the information in
HOSTUEADDR, can help a developer determine why the
USB host issued an OCPI bus access that resulted in an
unrecoverable error.
The host time-out control register controls the USB host controller OCPI bus
time-out mechanism. This register is not defined by the OHCI specification.
USB Host Controller
Type
Type
R
Universal Serial Bus (USB)
Reset
R 0x0000
0000
Reset
xxxxxxxx
0
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