Texas Instruments OMAP5912 Reference Manual page 1350

USB Host Controller
Table 25. HC Port 3 Status and Control Register (HCRHPORTSTATUS3)
(Continued)
Bit Name
2 PSS/SPS
1 PES/SPE
0 CCS/CPE
58 Universal Serial Bus (USB)
Description
Port 3 port suspend status/set port suspend
When read as 1, indicates that port 3 is in the USB suspend
state, or is in the resume sequence. When 0, indicates that
port 3 is not in the USB suspend state. This bit is cleared
automatically at the end of the USB resume sequence and
also at the end of the USB reset sequence.
If port 3 current connect status is 1, a write of 1 to this bit sets
the port 3 suspend status bit and places port 3 in USB
suspend state. If current connect status is 0, a write of 1
instead sets connect status change to inform the USB host
controller driver software of an attempt to suspend a
disconnected device. A write of 0 to this bit has no effect.
Port 3 enable status/set port enable
When read as 1, indicates that port 3 is enabled. When read
as 0, this bit indicates that port 3 is not enabled. This bit is
automatically set at completion of port 3 USB reset if it was
not already set before the USB reset completed and is
automatically set at the end of a USB suspend if the port was
not enabled when the USB resume completed.
A write of 1 to this bit when port 3 current connect status is 1
sets the port 3 enable status bit. A write of 1 when port 3
current connect status is 0 has no effect. A write of 0 has no
effect.
Port 3 current connection status/clear port enable
When read as 1, indicates that port 3 currently has a USB
device attached. When 0, indicates that no USB device is
attached to port 3.
This bit is set to 1 after root hub reset if the
HCRHDESCRIPTORB.DR[3] bit is set to indicate a
non-removable device on port 3.
A write of 1 to this bit clears the port 3 enable bit. A write of 0
to this bit has no effect.
The host UE address register reports the physical address of the last OCPI bus
access that caused an unrecoverable error (UE). This register has no meaning
until an unrecoverable error has occurred. It also has no meaning if the USB
host controller issues an unrecoverable error because the offset checking fault
occurred while processing an isochronous TD. This register is not defined by
the OHCI specification.
Type Reset
R/W 0
R/W 0
R/W 0
SPRU761A