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USB Device Controller
Specific MPU Required Actions
Non-Autodecoded Control Write Transfer Handshaking
130
Universal Serial Bus (USB)
If the device receives a valid set endpoint halt feature request, it must set the
appropriate CTRL.SET_HALT control bit.
If the device receives a valid CLEAR_ENDPOINT halt feature request, it must
set the appropriate CTRL.RESET_EP bit to clear the halt condition, FIFO
flags, and reset data PID to DATA0 for the endpoint. If the specified endpoint
number is 0, the MPU has only to set CTRL.CLR_HALT bit to clear the halt
condition.
If the device receives a valid SET_CONFIGURATION request, it must reset
all endpoints by setting the CTRL.RESET_EP control bits, set the
SYSCON1.SELF_PWR bit to the appropriate value, and then set halt
conditions for endpoints not used by the default interface set for the
configuration. If the device was addressed when the SET_CONFIGURATION
was received, the MPU must write 1 to the SYSCON2.DEV_CFG bit to allow
the device to move into the configured state (DEVSTAT.CFG bit set). If the
device was configured when the SET_CONFIGURATION was received, and
the new configuration value is 0, the MPU must write 1 to the
SYSCON2.CLR_CFG bit to allow the device to move back into the addressed
state (DEVSTAT.CFG bit cleared).
If the device receives a valid set interface request, it must reset all endpoints
used by the interface set, by setting CTRL.RESET_EP control bits, and then
set halt conditions for endpoints not used by this interface.
Other MPU required actions are specific to the request and not detailed in this
document.
Setup stage transactions that are valid are signaled ACK. Transactions with
invalid setup stage token or data packets are ignored and receive no
handshake packet from the USB module, and there is no interrupt generated.
Data stage handshaking for non-autodecoded control write transfers is
dependent on the endpoint 0 STAT_FLG.FIFO_EN, STAT_FLG.EP_HALTED,
and SYSCON2.STALL_CMD bits. The MPU can delay completion of any
transaction of the data stage by signaling NAK (via CTRL.SET_FIFO_EN bit
not set). The USB specification requires that once STALL is signaled in a
control transfer, it must be signaled on that endpoint until the next setup token
is received. Either the SYSCON2.STALL_CMD or the CTRL.SET_HALT
(reflected in the STAT_FLG.EP_HALTED register bit) register bits provide this
functionality. STAT_FLG.EP_HALTED does not reflect the forced STALL
caused by SYSCON2.STALL_CMD; it retains its previous value.
SPRU761A
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