Texas Instruments OMAP5912 Reference Manual page 1401

Multimedia processor device overview and architecture

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EPn_TX[14:12].EPn_TX_SIZE: Transmit Endpoint n Size

USB Device Transactions

EPn_TX.[14] bit description only applies for ISO endpoints.

This field contains the endpoint n FIFO size value. Status flags (FIFO_EMPTY,

FIFO_FULL) and underrun condition are based on this value for all IN

transactions to endpoint n.

ISO Endpoints

For ISO endpoints, a size of 1023 bytes takes up the whole memory and

prevents programming with a 2K-byte USB device controller.

Values after USB device controller hardware reset or USB reset are

unchanged (value is unknown until first write access).

There is an interrupt to the MPU at the end of an USB transaction if the MPU

has actions to perform. Isochronous transactions are an exception because

isochronous interrupt information is available at start of frame interrupts. The

MPU ISR code determines which endpoint and direction caused the interrupt

and acts appropriately. The following subsections describe in detail the

activities surrounding USB transactions that are not part of a DMA transfer.

Cases where a transaction occurs before the previous one has been handled

by the MPU are not taken into account in this part. The information is organized

so that each section deals with one type and direction of transaction, such as:

Non-isochronous, non-setup OUT transactions

Non-isochronous IN transactions

Isochronous OUT transactions

Isochronous IN transactions

This allows each section to focus only on a specific style of transaction without

adding in the confusion of special cases related to other styles.

Universal Serial Bus (USB)

USB Device Controller

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