Texas Instruments OMAP5912 Reference Manual page 1267

UARTs
6.7.2 UART FIFO Configuration
6.7.3 Baud Rate Data and Stop Configuration
202 Serial Interfaces
Goal:
To set trigger level for halt/restore (TCR register), set trigger level for
transmit/receive (TLR register), and configure FIFO (FCR register).
Procedure:
To write into both the TLR and TCR registers, EFR[4] must be set to 1 and
MCR[6] to 1. To write into FCR, EFR[4] must be set to 1. Note that EFR[4] =
1 was already done in the previous section. Therefore, a simple write to
MCR[6] is necessary.
MCR[6] = 1; Sets TCR TLR and FCR to the desired value.
Here accesses to TCR, TLR, and FCR must be disabled to avoid any further
undesired write to these registers. Hence,
LCR = 0xBF; Provides access to EFR
-
EFR[4] = 0
-
LCR[7] = 0
-
MCR[6] = 0
-
Goal:
To configure UART data, stop (LCR register) baud rate (DLH and DLL
registers), and enable UART operation. In case interrupt capability is added,
configuration must be added right before UART enable.
Procedure:
Set LCR to desired value.
-
LCR[7] to 1; Gives access to DLH and DLL registers
Set DLH and DLL;
-
LCR[7] = 0; Removes access to DLH and DLL registers
Set IER to desired value. Sets interrupts.
-
MDR1[2:0] = 0; Enables UART without autobauding
The UART module is operational.
SPRU760B