Texas Instruments OMAP5912 Reference Manual page 1260

Multimedia processor device overview and architecture
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Auto-RTS
Auto-CTS
6.6.11
Software Flow Control
SPRU760B
Auto-RTS data flow control originates in the receiver block (see Figure 61,
Functional Block Diagram). The receiver FIFO trigger levels used in auto-RTS
are stored in the TCR. RTS is active if the RX FIFO level is below the HALT
trigger level in TCR[3:0]. When the receiver FIFO HALT trigger level is
reached, RTS is deasserted. The sending device (for example, another UART)
may send an additional byte after the trigger level is reached because it may
not recognize the deassertion of RTS until it has begun sending the additional
byte. RTS is automatically reasserted once the receiver FIFO reaches the
RESUME trigger level programmed via TCR[7:4]. This reassertion requests
the sending device to resume transmission.
The transmitter circuitry checks CTS before sending the next data byte. When
CTS is active, the transmitter sends the next byte. To stop the transmitter from
sending the following byte, CTS must be deasserted before the middle of the
last stop bit that is currently being sent. The auto-CTS function reduces
interrupts to the host system. When auto-CTS flow control is enabled, the CTS
state changes need not trigger host interrupts because the device
automatically controls its own transmitter. Without auto-CTS, the transmitter
sends any data present in the transmit FIFO and a receiver overrun error can
result.
The enhanced feature register (EFR) and the modem control register (MCR)
enable software flow control. Different combinations of software flow control
are enabled by setting different combinations of EFR[3:0].
Two other enhanced features relate to software flow control:
XON any function (MCR[5]): The operation will resume after receiving any
-
character, after recognizing the XOFF character.
The XON-any character is written into the RX FIFO even if it is a software
flow character.
Special character (EFR[5]): Incoming data is compared to XOFF2.
-
Detection of the special character sets the XOFF interrupt (IIR[4]) but does
not halt transmission. A read of the IIR clears the XOFF interrupt. The
special character is transferred to the RX FIFO.
UARTs
Serial Interfaces
195

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