Texas Instruments OMAP5912 Reference Manual page 1347

Table 25. HC Port 3 Status and Control Register (HCRHPORTSTATUS3)
Bit Name
31:21 Reserved
20 PRSC
19 OCIC
SPRU761A
-
MCSI2.DOUT/USB2.TXEN
-
UART2.TX/USB2.TXD
-
UART2.RTS/USB2.SE0
-
UART2.CTS/USB2.RCV
-
MCSI2.DIN/USB2.VP
-
UART2.RX/USB2.VM
-
MCSI2.SYNC/USB2.SPEED
-
MCSI2.CLK/USB2.SUSP
The host controller port associated with this register can also be held in a state
where it always appears to be disconnected, depending on the HMC_MODE
value and top-level pin multiplexing (see Section 4.3, Pin Multiplexing).
HC port 3 is not capable of acting as the host portion of an OTG controller. OTG
functionality is only available through HC port 1 and HC port 2. See Section
4, USB OTG Controller.
Description
Reserved
Port 3 reset status change
This bit indicates, when 1, that the port 3 port reset status bit
has changed.
A write of 1 clears this bit. A write of 0 has no effect.
Port 3 overcurrent indicator change
This bit indicates, when 1, that the port 3 port overcurrent
indicator has changed.
A write of 1 clears this bit. A write of 0 has no effect.
The OMAP5912 does not provide inputs for signaling
external overcurrent indication to the USB host controller.
Overcurrent monitoring, if required, must be handled through
some other mechanism.
This bit has no relationship to the OTG controller register bits
that relate to VBUS. System software can update this register
to simplify host controller driver and/or OTG driver coding.
USB Host Controller
Type
R/W
R/W
Universal Serial Bus (USB)
Reset
0
0
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