Texas Instruments OMAP5912 Reference Manual page 1387

Table 47. DMA Receive Channels Configuration Register (RXDMA_CFG)
Bit Name
15:13 Reserved
12 RX_REQ
11:8 RXDMA2_EP
SPRU761A
This read-only register identifies the endpoint that causes a DMAn interrupt.
A write into it is denied.
Note:
If a DMA interrupt occurs before a previous one on another endpoint in the
same direction, the second interrupt is asserted only after the USB device
controller clears the first one. DMAn_STAT is updated when the correspond-
ing interrupt is asserted.
Description
Reserved
The RX DMA request active level or pulse bit allows the RXDMA request to be
configurable level or pulse-sensitive. When pulse-sensitive, the request is active
during 2 cycles.
0: RX DMA request active level
1: RX DMA request active pulse
Value after MPU or USB reset is low.
Receive endpoint number for DMA channel 2. The endpoint number binary
encoded in these four bits is the current receive endpoint selected for DMA
channel 2. A zero value indicates that the DMA channel 2 is deactivated. Any
other value automatically enables receive DMA transfer for the selected endpoint.
0000: Receive DMA channel 2 is deactivated.
0001: EP1
...
1111: EP15
Values after MPU or USB reset are low (all 4 bits).
USB Device Controller
Universal Serial Bus (USB) 95