Texas Instruments OMAP5912 Reference Manual page 1392

USB Device Controller
Table 50. Transmit DMA Control Register n (TXDMAn)
Bit Name
15 TXn_EOT
14 TXn_START
100 Universal Serial Bus (USB)
Description
Transmit DMA channel n end of transfer: the TXn_EOT bit can be either 0 or 1 for
BULK DMA transfer.
When the USB device controller sets it to 1, this bit signals the core that the
transfer size set in TXDMAn.TXn_TSC is in bytes. A TX one interrupt
(IRQ_SRC.TXn_DONE) is asserted with the last IN transaction. If the number of
bytes set in TXDMAn.TXn_TSC is a multiple of the endpoint buffer size, the TX
done interrupt is asserted only after an IN transaction with an empty data packet.
When cleared, the transfer size set in TXn_TSC is in full buffer size for the
endpoint selected (BULK only). A TX done interrupt is asserted when the last
buffer is sent with the last IN transaction. This mode is to be used for a partial
bulk transfer of a large file exceeding 1023 bytes.
0: DMA transfer size is in buffers.
1: DMA transfer size is in bytes.
Value after MPU or USB reset is low.
Transmit DMA channel n start. The USB device controller sets this bit to tell the
device that the main DMA system is ready to transmit the number of bytes or
buffers. Once set, the DMA transfer cannot be interrupted, unless the USB device
controller clears the endpoint in the TXDMA_CFG register. A write 0 into this bit
has no effect and a read to this bit always returns 0. The IRQ_SRC.TXn_DONE
interrupt bit is asserted when the DMA transfer ends.
0: No action
1: DMA transfer start
Always reads 0
SPRU761A