Texas Instruments OMAP5912 Reference Manual page 1331

Multimedia processor device overview and architecture
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Table 15. HC Frame Interval Register (HCFMINTERVAL)
Bit
Name
31
FIT
30:16
FSMPS
15 :14
Reserved
13 :0
FI
Table 16. HC Frame Remaining Register (HCFMREMAINING)
Bit
Name
31
FRT
30:14
Reserved
13 :0
FR
SPRU761A
Description
Frame interval toggle
The host controller driver must toggle this bit any time it
changes the frame interval field.
Largest data packet
Largest data packet size allowed for full-speed packets, in bit
times.
Reserved
Frame interval
Number of 12-MHz clocks in the USB frame. Nominally, this
is set to 11,999, to give a 1-ms frame. The host controller
driver can make minor changes to this field to attempt to
manually synchronize with another clock source.
The HC frame remaining register reports the number of full-speed bit times
remaining in the current frame.
Description
Frame remaining toggle
This bit is loaded with the frame interval toggle bit every time
the USB host controller loads the frame interval field into the
frame remaining field.
Reserved
Frame remaining
The number of full-speed bit times remaining in the current
frame. This field is automatically reloaded with the frame
interval field value at the beginning of every frame.
The HC frame number register reports the current USB frame number.
USB Host Controller
Type
R/W
R/W
R/W
Type
Universal Serial Bus (USB)
Reset
0
0x0000
0x2EDF
Reset
R
0
R
0x0000
39

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