Texas Instruments OMAP5912 Reference Manual page 1272

SPRU760B
The hardware sends the one byte of the TX write data register.
J
The time-out bit is always cleared in a write.
J
The completion of the operation sets the TX complete flag in the
J
interrupt status register. If interrupts are masked, no interrupt is
generated. The interrupt status register is always cleared at the
beginning of any read or write operation.
At the end of the write, the go bit is cleared.
J
4) If interrupt is enabled, software must read the interrupt status register to
clear the interrupt.
5) Repeat for each successive byte.
Read operation:
1) Write the ID value to the TX write register.
2) Write 0 to R/W bit and 1 to the go bit and wait for TX complete interrupt.
3) Write the command value to the TX write register.
4) Write 0 to R/W bit and 1 to the GO bit and wait for TX complete interrupt.
5) Write 1 to the R/W bit of the control and status register to indicate a read.
6) Write 1 to the go bit of the control and status register to start the actual
read. This step and the above step can be done at the same time.
The hardware creates a low-going edge of the line (created by the
J
slave), and clocks 8 bits of data into the RX receive buffer register. The
first bit that is received from the slave is the LSB and the last bit is the
MSB of the byte.
The time-out bit is always cleared in a read.
J
The completion of the operation sets the RX complete flag in the
J
interrupt status register. If interrupts are masked, no interrupt is
generated. The interrupt status register is always cleared at the
beginning of any read or write operation.
At the end of the read, the go bit is cleared. It is also cleared if a
J
time-out is detected.
7) If interrupt is enabled, software must read the interrupt status register to
determine if RX was completed or whether there was a time-out.
8) Software does a read of the RX buffer register to retrieve the read data
from the slave.
9) Repeat for each successive byte.
HDQ and 1-Wire Protocols
Serial Interfaces 207