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Table 77. IrDA Mode Register (IIR) (Continued)
Bit
Name
3
RX_OE_IT
2
RX_FIFO_LAST_
BYTE_IT
1
THR_IT
0
RHR_IT
Table 78. Enhanced Feature Register (EFR)
Bit
Name
7
AUTO_CTS_EN
6
AUTO_RTS_EN
5
SPECIAL_CHAR_
DETECT
SPRU760B
Function
0: RX overrun interrupt inactive.
1: RX overrun interrupt active.
0: Last byte of frame in RX FIFO interrupt inactive.
1: Last byte of frame in RX FIFO interrupt active.
0: THR interrupt inactive.
1: THR interrupt active.
0: RHR interrupt inactive.
1: RHR interrupt active.
Offset Address (hex): 0x02 x S and LCR = 0xBF
This register enables or disables enhanced features. Most of the enhanced
functions apply only to UART modes, but EFR[4] enables write access to
FCR[5:4], the TX trigger level, which is also used in IrDA modes.
Function
Auto-CTS enable bit
0: Normal operation.
1: Auto-CTS flow control is enabled, that is,
transmission is halted when the CTS pin is high
(inactive).
Auto-RTS enable bit
0: Normal operation.
1: Auto-RTS flow control is enabled. RTS pin goes
high (inactive) when the receiver FIFO HALT
trigger level, TCR[3:0], is reached, and goes low
(active) when the receiver FIFO RESTORE
transmission trigger level is reached.
0: Normal operation.
1: Special character detect enable.
Received data is compared with XOFF2 data. If a
match occurs the received data is transferred to
FIFO, and IIR bit 4 is set to 1 to indicate that a
special character has been detected.
UARTs
R/W
Reset
R
0
R
0
R
0
R
0
R/W
Reset
R/W
0
R/W
0
R/W
0
Serial Interfaces
159
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