Read/Write Access Address (Rwa) - STMicroelectronics SPC572L series Reference Manual

RM0400
66.4.15

Read/Write Access Address (RWA)

The Read/Write Access Address Register provides the system bus address to be accessed
when initiating a read or a write access.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
66.5 Nexus 3 Register Access via JTAG/OnCE
Access to Nexus 3 register resources is enabled by loading a single instruction ("NEXUS3-
ACCESS") into the JTAG Instruction Register (IR) (OnCE OCMD register). For the Nexus 3
block, the OCMD value is 0b0001111100.
Once the NEXUS3-ACCESS instruction has been loaded, the JTAG/OnCE port allows
tool/target communications with all Nexus 3 registers according to the register map in
Table 1077.
Reading/writing of a Nexus 3 register then requires two (2) passes through the Data-Scan
(DR) path of the JTAG state machine. (See
sequences.)
1. The first pass through the DR selects the Nexus 3 register to be accessed by providing
an index (see
an 8-bit value into the JTAG Data Register (DR). This register has the following format:
Nexus Register Index
Read/Write (R/W)
2. The second pass through the DR then shifts the data in or out of the JTAG port, LSB
first.
a)
b)
Read/Write Address
Nexus Reg# 0x9; Read/Write; Reset: 0x0
Figure 1156. Read/Write Access Address (RWA) register
Table 1077), and the direction (read/write). This is achieved by loading
Figure 1157. JTAG DR format
Table 1097. JTAG DR field descriptions
During a read access, data is latched from the selected Nexus register when the
JTAG state machine passes through the "Capture-DR" state.
During a write access, data is latched into the selected Nexus register when the
JTAG state machine passes through the "Update-DR" state.
DocID027809 Rev 4
Section 66.23, IEEE 1149.1 (JTAG) RD/WR
(7 bits)
Nexus Register Index
Selected from values in
0 Read
1 Write
e200z215An3 Nexus 3 Module
9 8 7 6 5 4 3
(1 bit)
R/W
RESET Value: 0x00
Table 1077
2 1 0
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