Data Trace Control (Dtc) Register - STMicroelectronics SPC572L series Reference Manual

e200z215An3 Nexus 3 Module
Bits Name
31:30 —
29:28 SPTHOLD
27:22 —
21:16 SPEN
15:14 —
13:12 STTHOLD
11:1 —
0 STEN
66.4.10

Data Trace Control (DTC) register

The Data Trace Control Register controls whether DTM Messages are restricted to reads,
writes, or both for a user programmable address range. In addition, control is provided to
restrict data trace message generation to only those load or store accesses that are not
stack-related, in order to minimize required data trace message bandwidth.
There are four Data Trace channels controlled by the DTC for the Nexus 3 module.
Channels can be programmed to trace data accesses or instruction accesses, but not
independently.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
The following table details the Data Trace Control register fields.
1936/2058
Figure 1144. OVCR field descriptions
Reserved, should be cleared
Suppression Threshold
00 Suppression threshold is when message queues are 1/4 full
01 Suppression threshold is when message queues are 1/2 full
10 Suppression threshold is when message queues are 3/4 full
11 Reserved
Reserved, should be cleared
Suppression Enable
000000 Suppression is disabled
xxxxx1 Ownership Trace message suppression is enabled
xxxx1x Data Trace message suppression is enabled
xxx1xx Program Trace message suppression is enabled
xx1xxx Watchpoint Trace message suppression is enabled
x1xxxx Reserved
1xxxxx Data Acquisition message suppression is enabled
Reserved, should be cleared
Stall Threshold
00 Stall threshold is when message queues are 1/4 full
01 Stall threshold is when message queues are 1/2 full
10 Stall threshold is when message queues are 3/4 full
11 Reserved
Reserved, should be cleared
Stall Enable
0 Stalling is disabled
1 Stalling is enabled
0
Nexus Reg# 0xD; DCR: 376; Read/Write; Reset: 0x0
Figure 1145. Data Trace Control (DTC) register
DocID027809 Rev 4
Description
0
9 8 7
RM0400
0
6 5 4 3 2 1 0