Configuration, Control And Status Register Set; Host Capability Registers - Intel IXP45X Developer's Manual

Intel
9.9

Configuration, Control and Status Register Set

Table 124. Host Capability Registers (Sheet 1 of 2)
Offset
020h-
0FCh
100h
101h
102h
104h
108h
10Ch –
11Fh
120h
122h
124h
128h –
13Ch
140h
144h
148h
14Ch
150h
154h
158h
160h
164h
16Ch
170-
17Ch
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
366
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IXP45X and Intel IXP46X Product Line of Network Processors—USB 2.0 Host Controller
Size
Mnemonic
(Bytes)
232 (Reserved)
1 CAPLENGTH
1 (Reserved)
2 HCIVERSION
4 HCSPARAMS
4 HCCPARAMS
20 (Reserved)
2 (Reserved)
2 (Reserved)
4 DCCPARAMS
24 (Reserved)
4 USBCMD
4 USBSTS
4 USBINTR
4 FRINDEX
4 (Reserved)
PERIODICLISTBASE
4
Device Addr
ASYNCLISTADDR
4
Endpointlist Addr
4 BURSTSIZE
4 TXFILLTUNING
4 N/A
16 N/A
Register Name
N/A
Capability Register
Length
N/A
Host Interface
Version Number
Host Ctrl.
Structural
Parameters
Host Ctrl.
Capability
Parameters
N/A
N/A
Device Ctrl.
Capability
Parameters
N/A
USB Command
USB Status
USB Interrupt
Enable
USB Frame Index
4G Segment
Selector
Frame List Base
Address
USB Device
Address
Next Asynchronous
List Address
Address at
Endpoint list in
memory
Programmable
Burst Size
Host Transmit Pre-
Buffer Packet
Tuning
(Reserved)
(Reserved)
Order Number: 306262-004US
Single
Port
Host
(SPH)
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August 2006