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®
Intel XScale
Processor—Intel
Table 18.
Fault Status Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
reset value: unpredictable
Bits
31:11
10
9
8
7:4
3:0
3.5.1.7
Register 6: Fault Address Register
Table 19.
Fault Address Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
reset value: unpredictable
Bits
31:0
3.5.1.8
Register 7: Cache Functions
All the functions defined in existing Intel
XScale processor adds other functions as well. This register should be accessed as
write-only. Reads from this register, as with an MRC, have an undefined effect.
The Drain Write Buffer function not only drains the write buffer but also drains the fill
buffer.
The Intel XScale processor does not check permissions on addresses supplied for cache
or TLB functions. Due to the fact only privileged software may execute these functions,
full accessibility is assumed. Cache functions will not generate any of the following:
• Translation faults
• Domain faults
• Permission faults
The invalidate instruction cache line command does not invalidate the BTB. If software
invalidates a line from the instruction cache and modifies the same location in external
memory, it needs to invalidate the BTB also. Not invalidating the BTB in this case may
cause unpredictable results.
August 2006
Order Number: 306262-004US
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
Access
Read-unpredictable / Write-as-Zero
Read / Write
Read / Write
Read-as-zero / Write-as-Zero
Read / Write
Read / Write
Access
Read / Write
Intel
Reserved
Status Field Extension (X)
This bit is used to extend the encoding of the Status field,
when there is a prefetch abort and when there is a data
abort. The definition of this field can be found in
Architecture" on page 177
Debug Event (D)
This flag indicates a debug event has occurred and that
the cause of the debug event is found in the MOE field of
the debug control register (CP14, register 10)
= 0
Domain - Specifies which of the 16 domains was being
accessed when a data abort occurred
Status - Type of data access being attempted
Fault Virtual Address
Fault Virtual Address - Contains the MVA of the data
access that caused the memory abort
®
*
StrongARM
products appear here. The Intel
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors
8
7
6
5
4
3
2
X D 0
Domain
Status
Description
"Event
8
7
6
5
4
3
2
Description
Developer's Manual
1
0
1
0
103
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