Pci Controller Configured As Host - Intel IXP45X Developer's Manual

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PCI Controller—Intel IXP45X and Intel
10.2.2

PCI Controller Configured as Host

The IXP45X/IXP46X network processors can be configured as a host function on the
PCI bus. Configuring the IXP45X/IXP46X network processors as a host does not require
the internal PCI arbiter function in the PCI Controller to be enabled.
The first step to using the PCI interface in any mode of operation is to determine the
mode of operation and then configure the interface. The PCI bus mode of operation can
be obtained by reading bit 0 of the PCI Controller Control and Status Register
(PCI_CSR). If bit 0 of the PCI Controller Control and Status Register (PCI_CSR) is set to
logic 0, the IXP45X/IXP46X network processors are required to function as an Option
on the PCI bus. If bit 0 of the PCI Controller Control and Status Register (PCI_CSR) is
set to logic 1, the IXP45X/IXP46X network processors are required to function as the
Host on the PCI bus.
Bit 0 of the PCI Controller Control and Status Register (PCI_CSR) will be set by the
logic level contained on Expansion Bus Address Bus bit 1 at the de-assertion of the
reset signal supplied to the IXP45X/IXP46X network processors. The internal arbiter
will be enabled/disabled based on the logic level contained on Expansion Bus Address
Bus bit 2 at the de-assertion of the reset signal supplied to the IXP45X/IXP46X network
processors. The PCI Controller Control and Status Register (PCI_CSR) bit 1 captures
the logic level contained on Expansion Bus Address Bus bit 2 at the de-assertion of
reset.
If bit 1 of the PCI Controller Control and Status Register (PCI_CSR) is set to logic 1, the
internal arbiter is enabled on the IXP45X/IXP46X network processors. If bit 1 of the PCI
Controller Control and Status Register (PCI_CSR) is set to logic 0, the internal arbiter is
disabled on the IXP45X/IXP46X network processors.
Once the PCI controller has determined that the mode of operation is to be host, the
IXP45X/IXP46X network processors are required to configure the rest of the PCI bus.
However, before the IXP45X/IXP46X network processors can configure the rest of the
PCI bus, the PCI Controller must be configured.
The Configuration and Status Registers must be initialized and the PCI Controller
Configuration and Status Registers must be initialized. (For more detail on initializing
the Configuration and Status Registers, see
and Status Registers for Data Transactions" on page
the PCI Controller Configuration and Status Registers, see
Controller Configuration Registers" on page
After the local Configuration and Status Register and PCI Controller Configuration and
Status Registers have been initialized, the remainder of the PCI bus is ready to be
configured by the hosting network processor. The IXP45X/IXP46X network processors
will now begin to initiate configuration cycles to all of the potential devices on the PCI
bus.
The order and nature in which the devices are learned is up to the individual
application. However, one bit must be configured prior to initiating PCI Configuration
Cycles with the IXP45X/IXP46X network processors. Bit 2 of the PCI Control Register/
Status (PCI_SRCR) Register must be set to logic 1 using the methods described in
"Initializing the PCI Controller Configuration Registers" on page
2 to logic 1 enables PCI bus-mastering capability.
Two types of PCI Configuration Cycles can be generated using the IXP45X/IXP46X
network processors: Type 0 and Type 1 Configuration Cycles. Type 0 Configuration
Cycles are use to communicate to a PCI device which is contained on the same local
segment that the generator of the Configuration Cycles.
are use to communicate to a PCI device which is contained on another segment of the
PCI bus other than the PCI bus segment that is generating the Configuration Cycles,
i.e., a segment on the other side of a PCI bridge.
August 2006
Order Number: 306262-004US
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IXP46X Product Line of Network Processors
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Intel IXP45X and Intel
"Initializing PCI Controller Configuration
505. For more detail on initializing
"Initializing the PCI
509.)
509. The setting of bit
Type 1 Configuration Cycles
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IXP46X Product Line of Network Processors
Develepor's Manual
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