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Intel
19.5.2.12
Auxiliary Slave Mode Snapshot Low Register – ASMS_Low
Register Name:
Block
RegBlockAddress
Base Address:
Auxiliary Slave Mode Snapshot Low Register
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits
Name
When the board is operating in Slave mode, an active high level on a general-
purpose input, asmssig, triggers a snapshot of System Time into the
ASMS_Low and ASMS_High registers. The general-purpose input is
synchronized by the Time Sync logic before it is used.
31:0
ASMS_Low
Note: The processor can configure the GPIO bit as an output, but it will always
be input-only to the Time Sync block.
When the ASMS snapshot occurs, the sns indication in the Time Sync Event
register is set. Writing a logic 1 to that bit clears the snapshot indication and
allows a new snapshot to occur on the next rising transition of asmssig.
19.5.2.13
Auxiliary Slave Mode Snapshot High Register – ASMS_High
Register Name:
Block
RegBlockAddress
Base Address:
Auxiliary Slave Mode Snapshot High Register
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits
Name
When the board is operating in Slave mode, an active high level on a general-
purpose input, asmssig, triggers a snapshot of System Time into the
ASMS_Low and ASMS_High registers. The general-purpose input is
synchronized by the Time Sync logic before it is used.
31:0
ASMS_High
Note: The processor can configure the GPIO bit as an output, but it will
always be input-only to the Time Sync block.
When the ASMS snapshot occurs, the sns indication in the Time Sync Event
register is set. Writing a logic 1 to that bit clears the snapshot indication and
allows a new snapshot to occur on the next rising transition of asmssig.
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
Developer's Manual
846
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors—Time Synchronization
Offset Address
ASMS_Low[31:0]
Description
Offset Address
ASMS_High[31:0]
Description
TS_ASMSLo
0x030
Reset Value
8
7
TS_ASMSLo
TS_ASMSHi
0x034
Reset Value
8
7
TS_ASMSHi
Hardware Assist (TSYNC)
0x0
Access:
(See below.)
6
5
4
3
2
1
0
Reset
Access
Value
0
RO
0x0
Access:
(See below.)
6
5
4
3
2
1
0
Reset
Access
Value
0
RO
August 2006
Order Number: 306262-004US
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