Bist/Header Type/Latency Timer/Cache Line Register; Base Address 0 Register - Intel IXP45X Developer's Manual

®
PCI Controller—Intel IXP45X and Intel
10.5.2.4

BIST/Header Type/Latency Timer/Cache Line Register

Register Name:
Block
0xC00000
Base Address:
Provides BIST, Header Type, Latency Timer, and Cache Line Size
Register Description:
registers as specified in the PCI 2.2 Local Bus Specification.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
BIST
Register
Bits Name
31:2
BIST BIST control register, not supported
4
Header Single Function/Multi-Function Device. Set to 0 to identify this device as a
23
Type[7] single-function PCI device.
22:1 Header
Configuration Header Type for this device. Set to 00
6 Type[6:0]
15:1 Latency
Latency Timer value in units of four PCI bus clocks.
0 Timer[7:2]
Latency 1
9:8 Hard-wired low order Latency Timer bits
Timer[1:0]
7:0 Cache Line Cache Line Size in units of 32-bit words.
10.5.2.5

Base Address 0 Register

Register Name:
Block
0xC00000
Base Address:
PCI Base Address register for AHB memory space access. Format
Register Description:
as specified in the PCI 2.2 Local Bus Specification.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
RWBase
Register
Bits Name
31:2
RWBase Read/Write bits of Base Address register.
4
Read-only bits of Base Address register. Specifies fixed 16MB address
23:4 FixedBase
range for this BAR.
August 2006
Order Number: 306262-004US
®
IXP46X Product Line of Network Processors
Offset Address
HeaderType
Description
Offset Address
FixedBase
pci_bar0 (Sheet 1 of 2)
Description
®
Intel IXP45X and Intel
pci_bhlc
0x0c
Reset Value
8 7
LatencyTimer
pci_bhlc
pci_bar0
0x10
Reset Value
8 7
FixedBase
®
IXP46X Product Line of Network Processors
0x00000000
Access: (See below.)
6 5 4 3 2 1 0
cache line
Reset PCI AHB
Value Access Access
0x00 RO RO
0 RO RO
0x00 RO RO
0x00 RW RW
0x0 RO RO
0x00 RW RW
0x00000008
Access: (See below.)
6 5 4 3 2 1 0
Type
Reset PCI AHB
Value Access Access
0x00 RW RW
0x000 RO RO
Develepor's Manual
553