®
Memory Controller—Intel
Figure 105. Logical Memory Image of a DDRI SDRAM Memory Subsystem
Bank0 Leaf0
Bank0 Leaf1
Bank0 Leaf2
Bank0 Leaf3
Bank1 Leaf0
Bank1 Leaf1
Bank1 Leaf2
Bank1 Leaf3
Figure 105
and closed pages. If the above image represents a 128-Mbyte DDRI SDRAM memory
size, each bank is 64 Mbytes and each leaf is 16 Mbytes.
Only one page may be open within each of the leaf blocks. The page sizes depend on
the memory size implemented in the DDRI SDRAM memory subsystem as listed in
Table
203. The programmer can optimize DDRI SDRAM transactions by partitioning
code and data across the leaf boundaries to maximize the number of page hits.
August 2006
Order Number: 306262-004US
®
IXP45X and Intel
IXP46X Product Line of Network Processors
Page Address Registers
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illustrates how the logical memory image is partitioned with respect to open
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Leaf 3
Leaf 0
Leaf 1
Bank 1
Leaf 2
Leaf 3
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
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B4210-001
Developer's Manual
597
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