Intel
19.5.2.8
SystemTime_Low Register
Register Name:
Block
RegBlockAddress
Base Address:
SystemTime_Low Register
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits
Name
The system timer is a loadable up-counter, and reflects the local time in the
module. While the system timer is 64 bits wide, the lower 32 bits reside in this
register. The system timer is clocked by the module system clock and
incremented when the Accumulator register rolls over.
To read the entire system time value, the user must read this location first.
Reading this location captures the upper 32 bits of the system time in a
SystemTime
temporary register, which is accessed when the user reads the
31:0
_Low
SystemTime_High Register next.
Likewise, the SystemTime_Low Register must be written first when the user
wants to write a new 64-bit value to system time. The data written to this
register is captured in a holding register. When the user writes to the
SystemTime_High Register, all 64 bits are then written to the system timer.
Updating the system time with a direct write has precedence over increments
to the system time based on an Accumulator rollover.
19.5.2.9
SystemTime_High Register
Register Name:
Block
RegBlockAddress
Base Address:
SystemTime_High Register
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits
Name
This register contains the upper 32 bits of system time. When the user wants
SystemTime
to read or write the system time, this register must first access the
31:0
_High
SystemTime_Low Register. See
on page 844
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
Developer's Manual
844
®
®
IXP45X and Intel
IXP46X Product Line of Network Processors—Time Synchronization
Offset Address
SystemTime_Low[31:0]
Description
Offset Address
SystemTime_High[31:0]
Description
Section 19.5.2.8, "SystemTime_Low Register"
for more details.
TS_SysTimeLo
0x020
Reset Value
8
TS_SysTimeLo
TS_SysTimeHi
0x024
Reset Value
8
TS_SysTimeHi
Hardware Assist (TSYNC)
0x0
Access:
(See below.)
7
6
5
4
3
2
1
Reset
Access
Value
0
RW
0x0
Access:
(See below.)
7
6
5
4
3
2
1
Reset
Access
Value
0
RW
August 2006
Order Number: 306262-004US
0
0
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