Udc Byte Count Register 12; Endpoint 12 Byte Count (Bc[7:0]) - Intel IXP45X Developer's Manual

Register Name:
0 x C800B074
Hex Offset Address:
Register
Universal Serial Bus Device Endpoint 9 Byte Count
Description:
Access: Read-Only
31
Bits
31:0
7:0
8.5.28

UDC Byte Count Register 12

The byte count register maintains the remaining byte count in the active buffer of out
endpoint 12.
8.5.28.1

Endpoint 12 Byte Count (BC[7:0])

The byte count is updated after each byte is read. When software receives an interrupt
that indicates the endpoint has data, it can read the byte count register to determine
the number of bytes that remain to be read.
The number of bytes that remain in the input buffer is equal to the byte count +1.
Register Name:
0 x C800B078
Hex Offset Address:
Register
Universal Serial Bus Device Endpoint 12 Byte Count
Description:
Access: Read-Only
31
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
340
® ®
Intel IXP45X and Intel
(Reserved)
X
Resets (Above)
Register
Name
(Reserved)
Byte Count (read-only).
BC
Number of bytes in the FIFO is Byte Count plus 1 (BC+1).
(Reserved)
X
Resets (Above)
IXP46X Product Line of Network Processors—USB 1.1 Device
UBCR9
0x00000000
Reset Hex Value:
Bits
UBCR9
Description
UBCR12
0x00000000
Reset Hex Value:
Bits
Controller
8 7
BC[7:0]
0 0 0 0 0 0 0
(UBCR12)
8 7
BC[7:0]
0 0 0 0 0 0 0
August 2006
Order Number: 306262-004US
0
0
0
0