New; First-Level Descriptors; Second-Level Descriptors For Coarse - Intel IXP45X Developer's Manual

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Intel XScale Processor—Intel
3.8.3.2 New Page Attributes
The Intel XScale processor extends the page attributes defined by the C and B bits in
the page descriptors with an additional X bit. This bit allows four more attributes to be
encoded when X=1. These new encodings include allocating data for the mini-data
cache and write-allocate caching. A full description of the encodings can be found in
"Memory Attributes" on page
The Intel XScale processor retains Intel StrongARM definitions of the C and B encoding
when X = 0, which is different than the Intel StrongARM products. The memory
attribute for the mini-data cache has been moved and replaced with the write-through
caching attribute.
When write-allocate is enabled, a store operation that misses the data cache
(cacheable data only) will generate a line fill. If disabled, a line fill only occurs when a
load operation misses the data cache (cacheable data only).
Write-through caching causes all store operations to be written to memory, whether
they are cacheable or not cacheable. This feature is useful for maintaining data cache
coherency.
Bit 1 in the Control Register (coprocessor 15, register 1, opcode=1) is used reserved
for the P bit memory attribute for memory accesses made during page table walks. The
P bit is not implemented on the IXP45X/IXP46X network processors.
These attributes are programmed in the translation table descriptors, which are
highlighted in:
• Table 72, "First-Level Descriptors" on page 175
• Table 73, "Second-Level Descriptors for Coarse Page Table" on page 175
• Table 74, "Second-Level Descriptors for Fine Page Table" on page 176
Two second-level descriptor formats have been defined for the IXP45X/IXP46X network
processors, one is used for the coarse page table and the other is used for the fine page
table.
Table 72.

First-Level Descriptors

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Table 73. Second-Level Descriptors for Coarse Page Table
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
August 2006
Order Number: 306262-004US
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IXP45X and Intel IXP46X Product Line of Network Processors
70.
Coarse page table base address
Section base address
Fine page table base address
Large page base address
Small page base address
Extended small page base address
SBZ
SBZ TEX
SBZ
SBZ
TEX AP3
AP3
SBZ
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
8 7 6 5 4 3
P Domain SBZ
AP P Domain 0 C
P Domain SBZ
8 7 6 5 4 3
AP2 AP1 AP0 C
AP2 AP1 AP0 C
TEX AP C
Developer's Manual
2 1 0
0 0
0 1
B 1 0
1 1
2 1 0
0 0
B 0 1
B 1 0
B 1 1
175