Byte Lane Routing During Pci Target Accesses Of The Ahb Bus - Big-Endian Ahb Bus - Intel IXP45X Developer's Manual

Figure 95. Byte Lane Routing During PCI Target Accesses of the AHB Bus – Big-Endian
AHB Bus
31
24
PCI Data
3
31
24
AHB Data 00
31
24
PCI Data
3
31
24
AHB Data 00
® ®
Intel IXP45X and Intel IXP46X Product Line of Network Processors
Develepor's Manual
542
®
Intel IXP45X and Intel
Write,
pci_csr.PDS = 1
23 16 15 7
8 0
2 0
1
23 16 15 7
8 0
01 11
10
Write,
pci_csr.PDS = 0
23 16 15 7
8 0
2 0
1
23 16 15 7
8 0
01 11
10
®
IXP46X Product Line of Network Processors—PCI Controller
31 24
PCI Data
3
31 24
AHB Data
00
31 24
PCI Data
3
31 24
AHB Data
00
Read,
pci_csr.PDS = 1
23 16 15 8 7 0
2 1 0
23 16 15 8 7 0
01 10 11
Read,
pci_csr.PDS = 0
23 16 15 8 7 0
2 1 0
23 16 15 8 7 0
01 10 11
B4278-01
August 2006
Order Number: 306262-004US