26.4.5
Hash Data FIFO
Register Name:
Block
0x7000_
Base Address:
Hashing Coprocessor Data Register
Register Description:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Register
Bits
Name
31:0
Hash Data
Hash Data FIFO.
*** NOTE TO EEAS REVIEWERS: this register was tagged "MAS only" but should it be
EEAS also? I thought Rockwell needed all the debug info. ***
26.5
Compatibility
The SHA-1 algorithm is compliant to the FIPS 180-1 standard
fipspubs/fip180-1.htm).
The MD5 algorithm is compliant to RFC 1321 (http://www.faqs.org/rfcs/rfc1321.html).
®
®
Intel
IXP45X and Intel
IXP46X Product Line of Network Processors
Developer's Manual
924
®
®
Intel
IXP45X and Intel
Offset Address
Description
IXP46X Product Line of Network Processors—Hashing Unit (SHA)
Hash_Data
2210
Hash Data
Hash_Data
§ §
0x00000000
Reset Value
Access:
(See below.)
8
7
6
5
4
3
2
1
Reset
Access
Value
0x0
RW
(http://www.itl.nist.gov/
August 2006
Reference Number: 0014US
0
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