Key Functional Units; Network Processor Engines (Npes) - Intel IXP45X Developer's Manual

Intel
2.1

Key Functional Units

The following sections briefly describe the functional units and their interaction in the
system.
Unless otherwise specified, the functional descriptions apply to all of the IXP45X/
IXP46X network processors.
For details on feature support listed by processor model, see the Intel
®
Intel IXP46X Product Line of Network Processors Datasheet.

Network Processor Engines (NPEs)

2.1.1
The network processor engines (NPEs) are dedicated-function processors containing
hardware coprocessors integrated into the IXP45X/IXP46X network processors. The
NPEs are used to off-load processing function required by the Intel XScale processor.
These NPEs are high performance, hardware multi-threaded processors with additional
local hardware assist functionality used to off-load highly processing intensive functions
such as MII (MAC), CRC checking/generation, AAL segmentation and re-assembly, AES,
AES-CCM, DES, SHA-1/256/384/512, MD5, etc.
All instruction code is stored locally for the NPEs, each of which has a dedicated
instruction memory bus and dedicated data memory bus.
These NPEs support processing of the dedicated peripherals that can include:
• One UTOPIA Level 2 (Universal Test and Operation PHY Interface for ATM) interface
• Two High-Speed Serial (HSS) interfaces
• Up to three Media-Independent Interface (MII) or Serial Media Independent
Interfaces (SMII)
There are several possible combination of interfaces for the NPEs contained on the
IXP45X/IXP46X network processors. These interface combinations are configured by
setting expansion bus address straps during reset. Detailed information on settings can
be found in the Intel
Datasheet. Refer to the Intel
Update as well to ensure the most up-to-date information regarding corrections to
documentation.
The NPE core is a hardware multi-threaded processor engine separate from, but
operating in parallel with the Intel XScale processor. The NPE is used to off-load and
accelerate network data packet processing that would otherwise take processing cycle
time on the Intel XScale processor. Each NPE core is a 133.32-MHz processor core that
has self-contained instruction memory and self-contained data memory that operate in
parallel. Each NPE core has 4 K words of instruction memory and 4 K words of data
memory.
In addition to having separate instruction/data memory, the NPE core supports
hardware multi-threading with support for multiple contexts. The support of hardware
multi-threading creates an efficient processor engine with minimal processor stalls due
to the ability of the processor to switch contexts in a single clock cycle, based on a
prioritized/preemptive basis. The prioritized/preemptive nature of the context switching
allows time-critical applications to be implemented in a low-latency fashion — which is
required when processing multi-media applications.
The NPE core also connects to several hardware-based coprocessors that are used to
implement functions that are difficult for a processor to implement. These functions
include:
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Intel IXP45X and Intel IXP46X Product Line of Network Processors
Developer's Manual
48
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IXP45X and Intel IXP46X Product Line of Network Processors—Functional Overview
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IXP45X and Intel
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IXP4XX Product Line of Network Processors Specification
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IXP46X Product Line of Network Processors
Reference Number: 306262-004US
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IXP45X and
August 2006